Simon Davidmann -
Curriculum Vitae
Summary
Nationality: British, Born:
A serial technology entrepreneur who in the last 40 years has been involved with 6 US based Electronic Design Automation (EDA) start-up companies which have all been successfully acquired for a total of over a Billion US Dollars in 2025 money. In each case Simon was the first employee in Europe or company founder and developed and established the business. The most recent was Imperas Software which he co-founded in 2005, managed as President, CEO, and Chairman and sold to Synopsys in late 2023. Imperas was a company initially focused on developing tools to make developing embedded software for multi-core processors easier, more efficient, and less costly. The company was initially funded by Accel Partners, and Pond Ventures, and in 2007 Simon completed a Management Buy Out and refocused Imperas on high performance processor and system modeling and in 2015 focused on RISC-V and verification. At the time of the Synopsys acquisition Imperas was fully owned by its staff, profitable, cash flow positive, growing fast, and developing world leading products for ARM embedded software developers and RISC-V verification users.
Prior to Imperas, Simon co-founded Co-Design Automation, in 1998, managed as President, CEO and Chairman, and sold to Synopsys, Inc., for $36M in mid 2002.Currently, Simon is a Vice President of engineering in Synopsys, Inc., the world's leading EDA company and he looks after processor modeling and verification.
Simon has been a Board advisor or Non-Executive Director of
several
Each start-up company Simon has been employed in has been at the cutting edge of advanced EDA software. It is EDA software tools that enable the development of large silicon Integrated Circuits and Systems-on-Chips. EDA is the technology that leading chip designers use - it is technology for technologists.
Having started in the late 70s as an EDA researcher at Essex
and
Returning to the
In 1988 Simon became the first European employee of Gateway
Design Automation, Inc., the
During 1993 Simon became Vice President and General Manager of
the European operations of Chronologic Simulation, Inc. - the developers of VCS
- the leading Verilog simulator of the 90's. (Verilog is the language of chip designers.) This role
involved setting up a new business in a new territory (
In 1995 he set up the European operations for Virtual Chips,
Inc., a pioneer in the re-useable silicon Intellectual Property business and
helped develop that business area by forming the
In 1997 Simon joined Ambit Design Systems, Inc, the inventor of
timing driven digital synthesis technology and set up the European operations
as VP/GM. Simon was the most successful sales person, and
Simon then co-founded Co-Design Automation, Inc, and spent the
next 4 years as CEO growing the
As one of the key people involved with the many phases in the life of the Verilog HDL, Simon was asked to co-author a technical paper in the ACM History Of Programming Languages conference. The conference is for invited papers and occurs once every 10 years. The paper was published in June 2020 and can be downloaded here: Verilog HDL and its ancestors and descendants.
While working in Europe for US companies, and in managing a
Personal
Simon is a collector of old radios, has owned and raced four 1930's Riley racing cars, and is working on building up a vintage guitar collection while playing the cello that he has been learning to play since 2014. He has participated in three London Triathlons, raised money cycling with Lance Armstrong's LiveStrong Cancer Charity, and runs/cycles when he can find the time. In 2011 Simon took up Olympic Skeet competitive shotgun shooting, has been Oxfordshire County Champion three times, South East UK Champion (veteran class), class winner at the English Open, British Grand Prix silver medalist (veteran class), English Open Champion (veteran class) in 2018, UK Open Champion (veteran class) in 2021, and has represented England 6 times in international competition.
In 2015 Simon cycled 956 miles in 10 consecutive days from John O'Groats in northern Scotland to Land's End in southern England (JOGLE) to raise over $15,000 for a cancer charity. There is more information and his daily blog here.Summary of Activities and Employment
2004-2014 - Visiting Professor, Queen Mary,
2023-current Synopsys, Inc., Vice President, Engineering, Processor Modeling and Verification.
2008-2023 Imperas Software, Ltd, CEO/CTO, Chairman. Created following management buyout of Imperas, Ltd. Developed the business plan, created the vision and technology direction and managed all other aspects of the company. Created and managed the OVPworld.org open source initiative and web dominated marketing approach.
2005-2008 Imperas, Ltd - Founder, CEO, Chairman. Raised $7M in VC funding from Accel
Partners, Pond Ventures. Focus of company was to develop software tools to
assist in the programming of multi-core embedded processors and systems. Built
the team, managed all aspects of the company.
2003-2005 - Retired (non-compete clause active from Co-Design/Synopsys acquisition) - spent time with family, friends and assisting other start-ups.
2002-2003 - Synopsys, Inc. Following acquisition of Co-Design, was Vice President Business Development, Verification Technology Group - responsible for developing European verification business.
1998-2002 Co-Design Automation, Inc. Co-Founder, President, Chairman, CEO. Co-Architecting the SUPERLOG language as a superset of Verilog and by working with Accellera made Superlog into a new IEEE standard. Developed the business plan, raised 3 rounds of funding, built the team, managed all aspects of the company, and successfully sold the company to Synopsys in Sept 2002.
1997-1998. Ambit Design Systems, Inc. Vice
President and European General Manager. Set-up and developed European
operations to market, sell, and support new generation of synthesis products.
Hired staff and distributors across Europe and made
1995-1997. RaviCAD, Virtual Chips, Inc. Vice President and European General Manager. Set-up and developed European operations. Helped develop business model of soft silicon Intellectual Property (IP) as a business. Hired staff and distributors, developed local marketing, sold and supported products. Virtual Chips was sold to Phoenix Technologies, Inc. in 1997.
1994-1998 - Kings College London, Visiting Lecturer, CAD/EDA course as part of MSc Digital Systems course. Member of external undergraduate advisory board.
1993-1995 Chronologic Simulation, Inc. Vice President
and European General Manager. Set-up and developed European operations of EDA
software simulation developer to market, sell, and support the new VCS product.
Hired staff and worked across
1991-1993 - European CAD Developments Ltd (EuCAD) part of Cadence Design Systems, Inc. - Business Development Manager for consulting service group. Helped build new business model of EDA consulting. Developed and sold complex design/verification project plans to customers, hired consultants, and managed projects.
1988-1991 - Gateway Design Automation, Inc, Cadence Design
Systems, Inc. European Technical Manager. Opened first Gateway European Office,
hired staff, supported the Verilog simulation based
products across
1984-1988 - Simmons Electronics, Ltd. Technical Director. Built new engineering department to develop new generation of processor based electronic percussion instruments for performing musicians. Developed products that included multi-microprocessors, real time embedded software, and digital ASIC design.
1980-1984 -
1975-1980 -
Publications (most notable)
Co-author of 5
Co-authored the definitive book on SystemVerilog - "SystemVerilog for Design".
Authored numerous articles, industry papers, and presented at many industry conferences.
Co-authored the invited ACM paper: Verilog HDL and its ancestors and descendants.
Industry keynotes and videos (sample)
RISC-V Summit 2022 Keynote presentation: Improving RISC-V Quality with Verification Standards and Advanced Methdologies www.youtube.com/watch?v=CojvlnbGD-A.
RISC-V Summit 2023 Keynote presentation: Solving the Conundrum of Custom Instructions https://www.youtube.com/watch?v=kBgwfX4H5Eo.
RISC-V Summit 2020 Tutorial: Getting Started with RISC-V Verification https://www.youtube.com/watch?v=G2IE7DM-tjE.
DVCon U.S 2022 Tutorial: Introduction to the 5 Levels of RISC-V Processor Verification https://www.youtube.com/watch?v=u8mYe5DYAic.
Participation in EDA Industry organisations
Member of Accellera Board of Directors - 1999-2002 - www.accellera.org
Member of Accellera committees: System Level Design Language, SystemVerilog 3.0, SystemVerilog Basic, Enhancement, Assertion, C interface committees -
Member of various IEEE Verilog committees.
Member of many RISC-V technical working groups and committees from 2017 to current.
Chair of OpenHW Verification Task Group, 2022-23.
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